Hardware opencore evaluation
US7089173B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2001 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Jul 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various techniques permit more thorough development of digital systems and devices by designers while protecting the proprietary interests of the owners of the intellectual property incorporated in such systems and devices. More specifically, the present invention provides to an end customer IP hardware which is suitable for prototype testing, but unusable for production purposes. One method limits the physical or electrical mode of operation of a hardware platform used for prototype testing of intellectual property (such as limiting the number of electrical contacts between the hardware and an external electrical device or limiting the data format(s) usable in the hardware during prototype testing). Another method limits the temporal operation of a hardware platform using an internal counter within the software provided by the intellectual property owner. Once a clock count limit is reached, the software disables the hardware in one or more prescribed ways, such as a reset of one or more registers, a global tri-state of the hardware IO, or a random failure of some type. Suitable hardware fabrication and/or augmentation also may be used to differentiate between the prototype and pr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.