Method of forming isolation films in semiconductor devices
US7091105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Apr 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of forming the isolation film in the semiconductor device which can prevent concentration of an electric field by forming a dual slant angle at the top corner of the trench in the course of forming the trench. After a photoresist pattern containing silicon components or an amorphous silicon film is formed on a pad oxide film instead of a pad nitride film, the surface of the photoresist pattern or the amorphous silicon film is oxidized so that the oxidized portion is fused with the isolation film. Accordingly, it is possible to prevent generation of a moat in the course of removing the photoresist pattern and the pad oxide film after the trench is buried with an insulating material. Therefore, the disclosed method can improve reliability of the process and an electrical characteristic of the resulting device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.