Indicating completion of configuration for programmable devices
US7091745B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 2004 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Jul 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17764
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various approaches for indicating completion of configuration of programmable logic devices are disclosed. In one embodiment, a plurality of configuration memory cells are arranged for storage of a configuration bitstream for implementing a circuit design on the programmable logic circuit. A plurality of configurable resources are coupled to the configuration memory cells, and each configurable resource implements a function based on data stored in one or more of the configuration memory cells coupled to the configurable resource. A logic circuit is coupled to a subset of the configuration memory cells and is configured to assert a done signal in response to states of the subset of the configuration memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.