Clock capture in clock synchronization circuitry
US7095261B2 · kind B2 · utility
16Cited by
15References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 5, 2004 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Jun 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Clock capturing synchronization circuitry first generates a synchronized clock signal from a reference clock signal, then captures the synchronized clock signal, and continues to output a synchronized clock signal after the reference clock signal is removed. The clock capturing synchronization circuitry also reduces input referred jitter in the synchronized clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.