Method and system for programming and inhibiting multi-level, non-volatile memory cells
US7095654B2 · kind B2 · utility
26Cited by
30References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2005 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3486
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-level non-volatile memory cell programming/lockout method and system are provided. The programming/lockout method and system advantageously prevent memory cells that charge faster than other memory cells from being over-programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.