Buck-boost circuit with normally off JFET
US7098634B1 · kind B1 · utility
14Cited by
10References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2003 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Aug 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/08
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An enhancement mode JFET as a switching device in a buck-boost converter circuit combined with a single rectifier diode and an inductor. A control circuit coupled to the gate of the JFET switches the JFET between a current conducting state and a current blocking state. The ratio of converter output voltage to converter input voltage is determined by the ratio of JFET current blocking time to the sum of JFET conduction time and JFET blocking time. This pulse width modulation scheme is thus used to adjust the dc output voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.