Method, system and computer program product for efficiently utilizing limited resources in a graphics device
US7098921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2001 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Dec 20, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management system provides microcode instructions that are divided into multiple tuned phases and stored as separate modules inside a phase code depository. A microcode manager, containing a mode detector, sequence identifier, code loader, drawing data processor and phase executor, interacts with a microcode processor and the phase code depository. The mode detector evaluates a user request for a desired mode. In response to a command from the mode detector, the sequence identifier selects a correct phase sequence that is needed to implement the desired mode. The code loader transfers the phase sequence from the phase code depository to the microcode processor where it is stored in a microcode instruction memory. The memory address for each module within the phase sequence is written to a microcode data memory. The drawing data for the graphics mode is sent from the drawing data processor to the microcode processor, and the phase executor instructs the microcode processor to execute the phase sequence to render the desired mode by processing the drawing data. The resulting data is forwarded to another processor for additional microcode processing, vector processing, raster…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.