Optical error minimization in a semiconductor manufacturing apparatus
US7098996B1 · kind B1 · utility
1Cited by
10References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 7, 2005 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Mar 7, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70983
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Provided are systems and methods for overcoming optical errors occurring from reticle and other hardware usage in a semiconductor fabrication apparatus. The systems and methods minimize optical errors, such as those resulting from gravitational sag on a reticle or mask, for a pattern being projected onto a wafer. The reduced errors allow larger reticles and masks to be used—while maintaining optical accuracy; and also improve optical budget management.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.