Speculative directory writes in a directory based cache coherent nonuniform memory access protocol
US7099913B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2000 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Jan 19, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed that reduces the latency of directory updates in a directory based Distributed Shared Memory computer system by speculating the next directory state. The distributed multiprocessing computer system contains a number of processor nodes each connected to main memory. Each main memory may store data that is shared between the processor nodes. A Home processor node for a memory block includes the original data block and a coherence directory for the data block in its main memory. An Owner processor node includes a copy of the original data block in its associated main memory, the copy of the data block residing exclusively in the main memory of the Owner processor node. A Requestor processor node may encounter a read or write miss of the original data block and request the data block from the Home processor node. The Home processor node receives the request for the data block from the Requestor processor node, forwards the request to the Owner processor node for the data block and performs a speculative write of the next directory state to the coherence directory for the data block without waiting for the Owner processor node to respond to the request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.