ASIC customization with predefined via mask
US7102237B1 · kind B1 · utility
4Cited by
3References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 28, 2003 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | May 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/907
Abstract
Disclosed herein is an integrated circuit customized by mask programming using custom conducting layers and via layers interspersed with the custom conducting layers, where the via layers are defined by masks designed prior to receiving a custom circuit design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.