Amplifier arrangement and control loop having the amplifier arrangement
US7102435B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2004 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Oct 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G1/0023
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier arrangement and also a control loop having the amplifier arrangement are specified, wherein the amplifier arrangement is based on a Gilbert multiplier. Connected in parallel in this case with one of the transistors of the differential amplifier cells is an additional transistor, at which it is possible to tap off a signal that is proportional to the gain factor. Processing this signal in a suitable manner, for example in a control loop, makes it possible to compensate for temperature and manufacturing fluctuations and also to obtain a highly linear characteristic curve having a gain factor which can be set in a stable manner. In addition, the structure shown is current-saving and can be used, in particular, for application in radio frequency technology as an amplifier having a variable gain factor (VGA).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.