Boundary-scan circuit used for analog and digital testing of an integrated circuit
US7102555B2 · kind B2 · utility
34Cited by
26References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Apr 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Method and apparatus are described for providing analog capability with boundary-scanning for an integrated circuit. The integrated circuit includes a boundary-scan controller (1517) coupled to an analog-to-digital converter (200). An analog channel is selected for input to the analog-to-digital converter (200). Analog information is converted to digital information by the analog-to-digital converter (200), and then such digital information may be stored in data registers (209) for reading out via the boundary-scan controller (1517).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.