Memory management for real-time applications
US7103748B2 · kind B2 · utility
14Cited by
8References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2002 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Nov 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.