Selective epitaxial growth for tunable channel thickness
US7105399B1 · kind B1 · utility
100Cited by
1References
19Claims
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Key dates
| Filing date | Dec 7, 2004 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Dec 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
Abstract
Gate electrodes with selectively tuned channel thicknesses are formed by selective epitaxial growth. Embodiments include forming shallow trench isolation regions in an SOI substrate, selectively removing the nitride stop layer and pad oxide layer in an exposed particular active region, and implementing selective epitaxial growth to increase the thickness of the semiconductor layer in the particular active region. Subsequently, the remaining nitride stop and pad oxide layers in other active regions are removed, gate dielectric layers formed, as by thermal oxidation, and the transistors completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.