Patent · US Expired

Clock dithering system and method during frequency scaling

US7106110B2 · kind B2 · utility

4Cited by

4References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Miles G. Canada · Colchester, US
Erwin B. Cohen · Durham, US
Jay G. Heaslip · Williston, US
Cedric Lichtenau · Stuttgart, DE
Thomas Pflueger · Echterdingen, DE
Mathew I. Ringler · Burlington, US

Key dates

Filing date	Jul 28, 2004
Grant date	Sep 12, 2006
Priority date	—
Expiry date	Jan 17, 2025

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system and method of shifting a clock frequency of an integrated circuit device from a first frequency to a second frequency, including alternating between the first frequency and the second frequency according to a dithering pattern, the alternating occurring for a predetermined number of cycles; and setting the clock frequency to the second frequency after the predetermined number of cycles.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.