Reconfiguration port for dynamic reconfiguration-controller
US7109750B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Jun 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/173
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for a controller for dynamic configuration is described. The controller comprises a port interface, a read/write interface, and a plurality of flip-flops. The flip-flops, couple the port interface to the read/write interface. The port interface is configured to receive a plurality of signals, where portion of the plurality of signals are pipelined through the plurality of flip-flops responsive to a data clock signal of the plurality of signals. This facilitates reading and writing to storage elements at a rate which is at least approximately a frequency of the data clock signal while operating a device at approximately such frequency in which the controller is instantiated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.