Dual port memory array using shared write drivers and read sense amplifiers

US7110304B1 · kind B1 · utility

Assignee

• Altera Corporation · US

Inventors

• Haiming Yu · San Jose, US
• Wei Yee Koay · Kampung Bukit Kechil, MY

Key dates

• Filing date: Aug 26, 2004
• Grant date: Sep 19, 2006
• Expiry date: Aug 26, 2024

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C8/16
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Dual port memory blocks that have a reduced layout area are provided. The write drivers and sense amplifiers are shared between the dual ports to reduce the number of write drivers and sense amplifiers to save layout area. The write drivers for the two ports are used to write into all of the first port's bitlines. The sense amplifiers for the two ports are used to read from all of the second port's bitlines. A memory block can to support true dual port (TDP) and simple dual port (SDP) operation using substantially less write drivers and sense amplifiers.