Haiming Yu
22Patents
7h-index
14Co-inventors
66Inventor score
Filing activity: Aug 26, 2004 → Jul 15, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7206251B1 | Dual port PLD embedded memory block to support read-before-write in one clock cycle | Physics | 19 | Expired |
| US7110304B1 | Dual port memory array using shared write drivers and read sense amplifiers | Physics | 14 | Expired |
| US7130238B1 | Divisible true dual port memory system supporting simple dual port memory subsystems | Electricity | 9 | Expired |
| US7689941B1 | Write margin calculation tool for dual-port random-access-memory circuitry | Physics | 7 | Active |
| US7471588B2 | Dual port random-access-memory circuitry | Physics | 7 | Active |
| US7679971B1 | Dual port PLD embedded memory block to support read-before-write in one clock cycle | Physics | 7 | Active |
| US7839713B1 | Reading and writing data to a memory cell in one clock cycle | Physics | 7 | Active |
| US7414916B1 | Using dedicated read output path to reduce unregistered read access time for FPGA embedded memory | Physics | 6 | Active |
| US7639557B1 | Configurable random-access-memory circuitry | Electricity | 5 | Active |
| US7289372B1 | Dual-port memory array using shared write drivers and read sense amplifiers | Physics | 5 | Active |
| US8867303B2 | Memory arbitration circuitry | Physics | 4 | Active |
| US7221185B1 | Method and apparatus for memory block initialization | Physics | 3 | Expired |
| USRE41325E1 | Dual port random-access-memory circuitry | General | 3 | Active |
| US7499365B1 | Dual port PLD embedded memory block to support read-before-write in one clock cycle | Physics | 2 | Active |
| US8483006B1 | Programmable addressing circuitry for increasing memory yield | Physics | 2 | Active |
| US8238191B2 | Dual port PLD embedded memory block to support read-before-write in one clock cycle | Physics | 2 | Active |
| US7715271B1 | Using dedicated read output path to reduce unregistered read access time for a FPGA embedded memory | Physics | 1 | Active |
| US9256266B1 | Negative bit line driver circuitry | Emerging Cross-Sectional Technologies | 1 | Active |
| US9501407B1 | First-in-first-out memory with dual memory banks | Emerging Cross-Sectional Technologies | 1 | Active |
| US12093777B2 | Method and terminal for identifying barcode | Physics | 0 | Active |
| US7269089B1 | Divisible true dual port memory system supporting simple dual port memory subsystems | Electricity | 0 | Active |
| USD1052714S1 | Suspension perfume diffuser | General | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.