Port adapter for high-bandwidth bus
US7111102B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2003 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Sep 6, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S370/912
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.