Garry P. Epps
25Patents
14h-index
20Co-inventors
77Inventor score
Filing activity: Dec 31, 1997 → Sep 12, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6980552B1 | Pipelined packet switching and queuing architecture | Electricity | 148 | Expired |
| US6721316B1 | Flexible engine and data structure for packet header processing | Electricity | 133 | Expired |
| US6977930B1 | Pipelined packet switching and queuing architecture | Electricity | 123 | Expired |
| US6778546B1 | High-speed hardware implementation of MDRR algorithm over a large number of queues | Electricity | 119 | Expired |
| US6813243B1 | High-speed hardware implementation of red congestion control algorithm | Electricity | 105 | Expired |
| US7643486B2 | Pipelined packet switching and queuing architecture | Electricity | 61 | Active |
| US7177276B1 | Pipelined packet switching and queuing architecture | Electricity | 59 | Expired |
| US6731644B1 | Flexible DMA engine for packet header modification | Electricity | 53 | Expired |
| US7715419B2 | Pipelined packet switching and queuing architecture | Electricity | 29 | Active |
| US6424649B1 | Synchronous pipelined switch using serial transmission | Electricity | 25 | Expired |
| US7792027B2 | Pipelined packet switching and queuing architecture | Electricity | 22 | Active |
| US7809009B2 | Pipelined packet switching and queuing architecture | Electricity | 19 | Active |
| US7554907B1 | High-speed hardware implementation of RED congestion control algorithm | Electricity | 14 | Active |
| US8018937B2 | Pipelined packet switching and queuing architecture | Electricity | 14 | Active |
| US7111102B2 | Port adapter for high-bandwidth bus | Emerging Cross-Sectional Technologies | 14 | Expired |
| US8571024B2 | Pipelined packet switching and queuing architecture | Electricity | 13 | Active |
| US7864791B2 | Pipelined packet switching and queuing architecture | Electricity | 12 | Active |
| US7729351B2 | Pipelined packet switching and queuing architecture | Electricity | 11 | Active |
| US7835649B2 | Optical data synchronization scheme | Electricity | 8 | Active |
| US7310695B2 | Port adapter for high-bandwidth bus | Emerging Cross-Sectional Technologies | 8 | Active |
| US7286525B1 | Synchronous pipelined switch using serial transmission | Electricity | 4 | Expired |
| US8000251B2 | Instrumenting packet flows | Electricity | 4 | Active |
| US7881617B2 | Buffering schemes for optical packet processing | Electricity | 3 | Active |
| US8665875B2 | Pipelined packet switching and queuing architecture | Electricity | 2 | Active |
| US7433988B2 | Port adapter for high-bandwidth bus | Emerging Cross-Sectional Technologies | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.