Methods for inspection sample preparation
US7112288B2 · kind B2 · utility
2Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2002 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Aug 15, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/24
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for delineating different layers and interfaces for inspection of a semiconductor wafer, wherein a sectioned portion of a wafer is subjected to a reactive ion etch process before inspection using a scanning electron microscope.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.