David Gerald Farber
19Patents
4h-index
27Co-inventors
56Inventor score
Filing activity: Jan 24, 2000 → Oct 7, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7741663B2 | Air gap spacer formation | Emerging Cross-Sectional Technologies | 54 | Active |
| US6232134A | Method and apparatus for monitoring wafer characteristics and/or semiconductor processing consistency using wafer charge distribution measurements | Electricity | 28 | Expired |
| US8064197B2 | Heat management using power management information | Emerging Cross-Sectional Technologies | 17 | Active |
| US6780756B1 | Etch back of interconnect dielectrics | Electricity | 15 | Expired |
| US8665592B2 | Heat management using power management information | Emerging Cross-Sectional Technologies | 4 | Active |
| US7112288B2 | Methods for inspection sample preparation | Electricity | 2 | Expired |
| US9054158B2 | Method of forming a metal contact opening with a width that is smaller than the minimum feature size of a photolithographically-defined opening | Electricity | 1 | Active |
| US8564120B2 | Heat dissipation in temperature critical device areas of semiconductor devices by heat pipes connecting to the substrate backside | Electricity | 1 | Active |
| US7687407B2 | Method for reducing line edge roughness for conductive features | Electricity | 1 | Expired |
| US8507386B2 | Lateral uniformity in silicon recess etch | Electricity | 1 | Active |
| US9490143B1 | Method of fabricating semiconductors | Electricity | 1 | Active |
| US6245686A | Process for forming a semiconductor device and a process for operating an apparatus | Electricity | 1 | Expired |
| US7745337B2 | Method of optimizing sidewall spacer size for silicide proximity with in-situ clean | Electricity | 1 | Active |
| US9437449B2 | Uniform, damage free nitride etch | Electricity | 1 | Active |
| US10453700B2 | Low damage low-k dielectric etch | Electricity | 1 | Active |
| US9224657B2 | Hard mask for source/drain epitaxy control | Electricity | 0 | Active |
| US7087518B2 | Method of passivating and/or removing contaminants on a low-k dielectric/copper surface | Electricity | 0 | Expired |
| US9881795B2 | Method of fabricating semiconductors | Electricity | 0 | Active |
| US9704720B2 | Uniform, damage free nitride ETCH | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.