Precision polysilicon resistor process
US7112535B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Mar 11, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
Abstract
A process is disclosed for fabricating precision polysilicon resistors which more precisely control the tolerance of the sheet resistivity of the produced polysilicon resistors. The process generally includes performing an emitter/FET activation rapid thermal anneal (RTA) on a wafer having partially formed polysilicon resistors, followed by steps of depositing a protective dielectric layer on the polysilicon, implanting a dopant through the protective dielectric layer into the polysilicon to define the resistance of the polysilicon resistors, and forming a silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.