Patent · US Expired

Advanced probe card and method of fabricating same

US7112975B1 · kind B1 · utility

5Cited by
22References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 23, 2004
Grant dateSep 26, 2006
Priority date—
Expiry dateFeb 23, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

In one embodiment, an anti-wafer structure includes a silicon on insulator (SOI) layer and a plurality of probe dice formed on the SOI layer. Each of the probe die may have a pad layout corresponding to a pad layout of a die on a wafer under test. A plurality of holes may extend through the SOI layer and the plurality of probe dice, with each hole corresponding to a pad on a probe die. The anti-wafer structure may be advantageously used in an advanced probe card. Techniques for fabricating an anti-wafer and an advanced probe card are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.