Device for reducing sub-threshold leakage current within a high voltage driver
US7113430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2002 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Dec 15, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device for reducing the effects of leakage current within electronic devices is disclosed. In one form, a high voltage driver includes a high voltage source coupled to at least one high voltage transistor and a leakage offset module coupled to at least a portion of one of the high voltage transistors. The leakage offset module includes a diode connected MOS device operable to generate an offset voltage and an MOS shunting device coupled in a parallel with the diode connected MOS device. During operation, the diode connected MOS device generates an offset voltage based on a sub-threshold leakage associated with using the high voltage source and the MOS shorting device is operable to short the diode connected MOS device when sub-threshold leakage current is relatively low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.