Vectored interrupt control within a system having a secure domain and a non-secure domain

US7117284B2 · kind B2 · utility

Assignee

• Arm Limited · GB

Inventors

• Simon Charles Watt · Cambridge, GB
• Christopher Bentley Dornan · Cambridge, GB
• Luc Orion · Mouans-Sartoux, FR
• Nicolas Chaussade · Mouans-Sartoux, FR
• Lionel Belnet · Villeneuve-Loubet, FR
• Stephane Eric Sebastien Brochier · Grasse, FR
• David Hennah Mansell · Cambridge, GB
• Jonathan Sean Callan · Cambridge, GB

Key dates

• Filing date: Nov 17, 2003
• Grant date: Oct 3, 2006
• Expiry date: Oct 31, 2024

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/4812
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A data processing apparatus is operable in a plurality of modes and in either a secure domain or a non-secure domain. When operating in a secure mode within the secure domain a program has access to secure data which is not accessible when the processor is operating in a non-secure mode. A vectored interrupt controller is provided to generate an exception handler address in response to an occurrence of an except condition. The vectored interrupt controller is programmable with parameters specifying for each exception condition whether an exception handler in the secure or the non-secure domain should be triggered and an exception handler address for use if the exception occurs when in the appropriate domain. The vectored interrupt controller also includes a parameter specifying a domain switching exception handler address for use if the exception condition occurs when the processor is not in the appropriate domain.