Luc Orion
28Patents
10h-index
17Co-inventors
68Inventor score
Filing activity: Nov 17, 2003 → Oct 16, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7849310B2 | Switching between secure and non-secure processing modes | Physics | 44 | Active |
| US7117284B2 | Vectored interrupt control within a system having a secure domain and a non-secure domain | Physics | 38 | Expired |
| US7661104B2 | Task following between multiple operating systems | Physics | 36 | Active |
| US7124274B2 | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain | Physics | 31 | Expired |
| US7305712B2 | Security mode switching via an exception vector | Physics | 30 | Expired |
| US7325083B2 | Delivering data processing requests to a suspended operating system | Physics | 26 | Expired |
| US7849296B2 | Monitoring control for monitoring at least two domains of multi-domain processors | Physics | 21 | Expired |
| US7661105B2 | Exception types within a secure processing system | Physics | 13 | Active |
| US7383587B2 | Exception handling control in a secure processing system | Physics | 13 | Expired |
| US7987407B2 | Handling of hard errors in a cache of a data processing apparatus | Physics | 11 | Active |
| US7949866B2 | Exception types within a secure processing system | Physics | 10 | Active |
| US7231476B2 | Function control for a processor | Physics | 9 | Expired |
| US7539853B2 | Handling interrupts in data processing of data in which only a portion of a function has been processed | Physics | 6 | Active |
| US9384091B2 | Error code management in systems permitting partial writes | Physics | 4 | Active |
| US8082589B2 | Diagnostic data capture control for multi-domain processors | Physics | 4 | Active |
| US10481914B2 | Predicting detected branches as taken when cumulative weight values in a weight table selected by history register bits exceed a threshold value | Physics | 4 | Active |
| US10990404B2 | Apparatus and method for performing branch prediction using loop minimum iteration prediction | Physics | 2 | Active |
| US11586944B2 | Allocation filter for prediction storage structure | Physics | 2 | Active |
| US7448050B2 | Handling multiple interrupts in a data processing system utilising multiple operating systems | Physics | 2 | Expired |
| US8086829B2 | Method and apparatus for processing data related to handling interrupts in data processing | Physics | 1 | Active |
| US10853076B2 | Performing at least two branch predictions for non-contiguous instruction blocks at the same time using a prediction mapping | Physics | 1 | Active |
| US11042379B2 | Apparatus and method for providing decoded instructions from a decoded instruction cache | Physics | 1 | Active |
| US7698537B2 | Data processing apparatus for processing a stream of instructions in first and second processing blocks with the first processing block supporting register renaming and the second processing block not supporting register renaming | Physics | 1 | Active |
| US11099850B2 | Branch prediction circuitry comprising a return address prediction structure and a branch target buffer structure | Physics | 1 | Active |
| US7984269B2 | Data processing apparatus and method for reducing issue circuitry responsibility by using a predetermined pipeline stage to schedule a next operation in a sequence of operations defined by a complex instruction | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.