Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure
US7118955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2004 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Mar 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method for the production of a semiconductor structure comprising a plurality of gate stacks on a semiconductor substrate which serve as control electrodes for a respective selection transistor of a corresponding memory cell comprising a storage capacitor. Gate stacks are provided next to one another on the substrate provided with a gate dielectric wherein the gate stacks have a lower first layer made of polysilicon, an overlying second layer made of metal silicide, and an upper layer made of silicon nitride. A sidewall oxide is formed on uncovered sidewalls of the first and second layers of the gate stacks, and at least partly the sidewall oxide is removed on those sidewalls of the gate stacks serving as a control electrode which are remote from the associated storage capacitor. Silicon nitride sidewall spacers are then formed on the gate stacks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.