Method of forming vias on a wafer stack using laser ablation
US7118989B2 · kind B2 · utility
7Cited by
2References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2004 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Dec 21, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are various embodiments of a method of forming vias for backside connections in a wafer stack, wherein the vias are formed by non-thermal laser ablation. Other embodiments are described an claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.