Semiconductor memory and method for operating a semiconductor memory
US7120074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2004 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Dec 17, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory includes storage cells (2) that have storage capacitors and transistors with an electrode, which is electrically biasable with two different electrical potentials (V1, V2) in order to open and close the transistor. The electrode potential (V2) intended for the off state of the transistor is a temperature-dependent potential, the value of which is controlled temperature-dependently by the semiconductor memory (1) so that the second electrical potential (V2) becomes more different from the first electrical potential (V1) as the temperature (T) increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.