Method for forming a filled trench in a semiconductor layer of a semiconductor substrate, and a semiconductor substrate with a semiconductor layer having a filled trench therein

US7122416B2 · kind B2 · utility

Assignee

• Analog Devices, Inc. · US

Inventors

• William Nevin · Kasai, JP
• Colin Gormley · Belfast, GB

Key dates

• Filing date: Oct 31, 2003
• Grant date: Oct 17, 2006
• Expiry date: Oct 31, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76286
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming an isolation filled trench (25) in a silicon layer (21) of an SOI structure (20). The trench (25) is relieved adjacent its open mouth (30) in order to displace the commencement of bridging of the trench (25) with the filling material, to a level (36) well below a first surface (27) of the silicon layer (21) for in turn displacing voids (35) from the open mouth (30) into the trench (25) below the level (36). The trench may be relieved by forming tapered portions (40) in the side wells (29) adjacent the open mouth (30), and/or by relieving one or more lining layers (32) in the trench (25) adjacent the open mouth (30) to form tapered portion (52) and (53). Instead of relieving the trench (25) by tapering the side walls (29) relieving recesses may be formed into the first surface (27) of the silicon layer (21) adjacent the open mouth (30). By relieving the trench (25) or one or more of the lining layers (32) adjacent the open mouth (30) the commencement of bridging of the trench with the filling material is displaced downwardly to a level (36), which displaces voids formed in the trench below the level (36). By sufficiently relieving the trench (25) and/or lining l…