Robust leaded molded packages and methods for forming the same

US7122884B2 · kind B2 · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• Elsie Agdon Cabahug · Consolacion, PH
• Marvin Gestole · Davao City, PH
• Margie Sebial Tumulak-Rios · Mandaue, PH
• Lilith U. Montayre · Balamban, PH
• Romel N. Manatad · Balamban, PH

Key dates

• Filing date: Apr 14, 2003
• Grant date: Oct 17, 2006
• Expiry date: Apr 14, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/13091
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for making a flip chip in a leaded molded package is disclosed. In some embodiments, the method includes using a leadframe structure including a die attach region and leads. The die attach region includes depressions proximate the inner portions of the leads, and an aperture in the die attach region. A semiconductor die is mounted to the die attach region. A molding material passes through the aperture and covers the first surface of the semiconductor die and the die attach region.