Decoupling capacitor for an integrated circuit and method of manufacturing thereof
US7123465B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2004 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Sep 24, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49139
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A capacitor structure may be incorporated into an interposer or substrate associated with an IC chip to stabilize the input/output signals, such as power and ground, between the IC chip and a printed circuit board. In accordance with one embodiment, the capacitor structure may include a plurality of individual capacitors connected together to form a monolithic capacitor blade having a length, width, and height, wherein each of the length and height of the blade spans multiple of the individual capacitors. The blade includes multiple electrical conductive paths extending the height of the capacitor blade. According to another embodiment, the capacitor structure includes multiple interleaved power and ground layers separated by insulating layers. The power layers connect to power leads and the ground layers connect to ground leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.