Patent · US Expired

Method for the defect analysis of memory modules

US7124336B2 · kind B2 · utility

5Cited by

6References

11Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Frank Adler · Pau, FR
Martin Versen · Hersbruck, DE

Key dates

Filing date	Jul 22, 2002
Grant date	Oct 17, 2006
Priority date	—
Expiry date	Sep 23, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/5606
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computer system has at least one data defect memory, at least one address defect memory and also a test program. The computer system is connected to a memory module that has a memory space with defect-free and defective memory cells, a plurality of data lines, and a plurality of address lines. The addresses of the defective memory cells in the memory space and the data lines that are connected to the defective memory cells are determined from the information items of the address defect memory and also from the information items of the data defect memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.