Method for enhancing the electric connection between a power electronic device and its package
US7126173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2002 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Sep 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/252
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic power device of improved structure is fabricated with MOS technology to have a gate finger region and corresponding source regions on either sides of the gate region. This device has a first-level metal layer arranged to independently contact the gate region and source regions, and has a protective passivation layer arranged to cover the gate region. Advantageously, a wettable metal layer, deposited onto the passivation layer and the first-level metal layer, overlies said source regions. In this way, the additional wettable metal layer is made to act as a second-level metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.