Patent · US Expired

Device and method to carry out a viterbi-algorithm

US7127666B2 · kind B2 · utility

0Cited by

9References

28Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Peter Aymar · Bietigheim-Bissingen, DE
Peter Bohnhoff · Munich, DE
Ralf Hartmann · Baldham, DE

Key dates

Filing date	May 24, 2001
Grant date	Oct 24, 2006
Priority date	—
Expiry date	Apr 9, 2024

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/4107
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An apparatus and method for executing a Viterbi algorithm includes initial state registers, at least one transition register, and an adder/subtracter network. Furthermore, evaluation units and a selection unit are provided for switching the apparatus between a first operating mode and a second operating mode. The selection unit can select different evaluation units depending on the selected operating mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.