Method and apparatus for manufacturing test generation
US7127691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2004 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Feb 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318357
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An improved method and process is provided for verifying a digital logic design complies with certain manufacturing test rules or guidelines. A replacement is created for any portion of a design to make it usable by the manufacturing test tool set, without requiring the contents of that portion of the design to be implemented. The inputs and outputs of a portion of the design are examined for violations of the manufacturing test rules or guidelines. If there are no violations, the contents of this portion of the design are replaced with some basic contents which satisfy the manufacturing structure rules. The interconnections between logic blocks can then be tested using test generation tools to ensure the design does not violate manufacturing test rules or guidelines The compliance verification can thus be done much earlier in the design process than typically occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.