Methods for selective deposition to improve selectivity
US7129139B2 · kind B2 · utility
19Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2003 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Mar 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
Methods and associated apparatus of forming a microelectronic structure are described. Those methods comprise providing a substrate comprising a region of higher active area density comprising source and drain recesses and a region of lower active area density comprising source and drain recesses, wherein the region of lower active area density further comprises dummy recesses, and selectively depositing a silicon alloy layer in the source, drain and dummy recesses to enhance the selectivity and uniformity of the silicon alloy deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.