Flip chip package and process of forming the same
US7129146B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 12, 2004 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Jan 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/166
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip package and a process of forming the same are disclosed. After aligning a chip on a circuit substrate according to the fiducial marks formed on the circuit substrate, a barrier material block is disposed on each of the fiducial marks. Thereafter, a fixing treatment, such a reflow or a curing treatment, is performed to transform the barrier material blocks into barrier layers for covering the fiducial marks respectively. The barrier layers are adapted for resisting exposure of fiducial marks from external air or moisture to reduce the possibility of fiducial marks from being oxidized. Thus, the reliability and the aesthetic appearance of the flip chip package can be effectively promoted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.