Computer program for programming an integrated circuit speed capability indicator
US7131089B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2003 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Dec 10, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2117/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer programmed to specify a design of a circuit for indicating a potential speed capability of a data path in a predetermined circuit. The data path comprises a plurality of logic functions to be performed by a first number of logic gates. The computer specifies the design by steps. In one step, the program specifies a second number of logic gates to be included in the circuit for indicating a potential speed capability. The second number of logic gates is less than the first number of logic gates and provides voltage and delay characteristics comparable to the data path. The computer also specifies additional circuitry to be included in the circuit for indicating a potential speed capability, wherein the additional circuitry is for representing parasitic characteristics in the data path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.