Sami Issa
29Patents
9h-index
11Co-inventors
68Inventor score
Filing activity: Jul 28, 2000 → Apr 20, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6480424B1 | Compact analog-multiplexed global sense amplifier for RAMS | Physics | 15 | Expired |
| US6678198B2 | Pseudo differential sensing method and apparatus for DRAM cell | Physics | 15 | Expired |
| US6653876B2 | Method and apparatus for synthesizing a clock signal using a compact and low power delay locked loop (DLL) | Electricity | 13 | Expired |
| US6898663B2 | Programmable refresh scheduler for embedded DRAMs | Physics | 11 | Expired |
| US6646954B2 | Synchronous controlled, self-timed local SRAM block | Physics | 10 | Expired |
| US6650572B2 | Compact analog-multiplexed global sense amplifier for rams | Physics | 10 | Expired |
| US6633952B2 | Programmable refresh scheduler for embedded DRAMs | Physics | 9 | Expired |
| US7162652B2 | Integrated circuit dynamic parameter management in response to dynamic energy evaluation | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7131089B2 | Computer program for programming an integrated circuit speed capability indicator | Physics | 9 | Expired |
| US6735135B2 | Compact analog-multiplexed global sense amplifier for RAMs | Physics | 7 | Expired |
| US7519925B2 | Integrated circuit with dynamically controlled voltage supply | Physics | 6 | Expired |
| US6760243B2 | Distributed, highly configurable modular predecoding | Emerging Cross-Sectional Technologies | 6 | Expired |
| US7197733B2 | Integrated circuit dynamic parameter management in response to dynamic energy evaluation | Physics | 6 | Active |
| US6600677B2 | Memory circuit capable of simultaneous writing and refreshing on the same column and a memory cell for application in the same | Physics | 5 | Expired |
| US6430098B1 | Transparent continuous refresh RAM cell architecture | Physics | 5 | Expired |
| US6882591B2 | Synchronous controlled, self-timed local SRAM block | Physics | 4 | Expired |
| US7154810B2 | Synchronous controlled, self-timed local SRAM block | Physics | 3 | Expired |
| US6947350B2 | Synchronous controlled, self-timed local SRAM block | Physics | 3 | Expired |
| US6898145B2 | Distributed, highly configurable modular predecoding | Emerging Cross-Sectional Technologies | 2 | Expired |
| US6650563B2 | Compact and highly efficient DRAM cell | Physics | 2 | Expired |
| US6717863B2 | Transparent continuous refresh RAM cell architecture | Physics | 2 | Expired |
| US7002383B1 | Method and apparatus for synthesizing a clock signal using a compact and low power delay locked loop (DLL) | Electricity | 2 | Expired |
| US6906946B2 | Compact and highly efficient DRAM cell | Physics | 2 | Expired |
| US7706170B2 | Compact and highly efficient DRAM cell | Physics | 1 | Active |
| US7274588B2 | Compact and highly efficient DRAM cell | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.