Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors
US7132856B2 · kind B2 · utility
18Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2004 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Nov 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356156
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic circuit performs an internal level conversion function by driving portions of the circuit with different supply voltages. In one embodiment, first and second stage storage circuits are driven with different supply voltages. In another embodiment, first and second stage storage circuits are driven with a first supply voltage and an inverter coupled to the first stage storage circuit is driven with a second supply voltage. In either case, data transfer into the storage circuits may be controlled by different states of a clock signal. The logic circuit may be a flip-flop circuit, a latch circuit, or another type of circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.