Method, system, and product for verifying voltage drop across an entire integrated circuit package
US7134103B2 · kind B2 · utility
1Cited by
5References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2003 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Oct 21, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2113/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system, and product are disclosed for determining a voltage drop across an entire integrated circuit package. A geometric description of the entire integrated circuit package is determined. The description is subdivided into non-uniform areas. A resistance of each one of the non-uniform areas is determined. A resistive netlist of the entire integrated circuit package is then determined by combining the resistance of each one of the non-uniform areas. The package is then simulated utilizing the netlist to determine the voltage drop across the entire integrated circuit package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.