Method for fabricating transistor gate structures and gate dielectrics thereof
US7135361B2 · kind B2 · utility
49Cited by
15References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2003 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Jan 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.