Tunable ESD trigger and power clamp circuit
US7136268B2 · kind B2 · utility
6Cited by
5References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2004 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Jul 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A circuit and a method for the electrostatic discharge protection of integrated circuits. The electrostatic discharge protection circuit, including: an electrostatic discharge protection circuit, comprising: a first bipolar transistor coupled between a first circuit node and a second circuit node, the first bipolar transistor having a non-uniform subcollector region geometry, the first bipolar transistor having a different value for collector to emitter breakdown voltage than a value for collector to emitter breakdown voltage of an otherwise identical bipolar transistor having a uniform subcollector region geometry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.