Power saving in FPU with gated power based on opcodes and data
US7137021B2 · kind B2 · utility
11Cited by
10References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2003 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Feb 14, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus are provided for saving power in a microprocessor. The microprocessor has at least one functional unit, which has a plurality of blocks. The blocks each include a plurality of sub-blocks. It is determined whether there is any instruction for the functional unit. Upon a determination that there is no instruction for the functional unit, the functional unit is shut down. Upon a determination that there is at least one instruction for the functional unit, at least one inactive block of the functional unit is shut down based on the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.