Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit
US7137080B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2003 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Jun 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit design has circuit macros made up of device cells. The cells are characterized by determining the leakage current dependency on various process, environmental and voltage parameters. When circuit macros are designed their leakage power is calculated using this data and multi-dimensional models for power and temperature distribution. Circuit macros are identified as timing-critical and timing-noncritical macros. Statistical methods are used to determine the average leakage sensitivities for the specific circuit macros designed. The designer uses the sensitivity data to determine how to redesign selected circuit macros to reduce leakage power. Reducing leakage power in these selected circuits may be used to reduce overall IC power or the improved power margins may be used in timing-critical circuits to increase performance while keeping power dissipation unchanged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.