Methods and arrangements to interface memory
US7139890B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2002 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Mar 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and arrangements to interface memory are described. Many embodiments comprise comparing a transaction or access from a source to memory addresses associated with the source to determine whether an address associated with the transaction is accessible by the source. Some embodiments may comprise defining protected memory. Several embodiments may comprise defining protected memory by, for example, determining a configuration for memory. Such embodiments may comprise protecting a memory location or limiting access to memory addresses associated with a protected memory location. Some of these embodiments may comprise accessing registers to define protected memory and verifying accesses to a memory location according to the definition of protected memory. Further embodiments may comprise generating an association between a source of an access and a memory location and storing the association to facilitate access to the memory location by the source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.