Patent · US Expired

Method of fabricating a substantially zero signal degradation electrical connection on a printed circuit broad

US7140531B2 · kind B2 · utility

4Cited by
23References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 3, 2003
Grant dateNov 28, 2006
Priority date
Expiry dateApr 28, 2024

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49128
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A method of fabricating a substantially zero signal degradation electrical connection on a printed circuit board includes providing a printed circuit board defined by a dielectric structure core. The dielectric structure core has a first surface, which includes a first connecting pad having an edge and a second connecting pad having an edge separated from an adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. A solder paste is applied on the first and second conducting pads and on the first surface of the dielectric structure core. The solder paste at least partially covers the surface area of the first surface between the edges of the first and second conducting pads, thereby forming a substantially zero signal degradation electrical connection between the first and second conducting pads.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.