Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers
US7141456B2 · kind B2 · utility
11Cited by
5References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2004 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Oct 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
Abstract
Methods for fabricating Fin-Field Effect Transistors (Fin-FETs) are provided. A fin is formed on an integrated circuit substrate. The fin defines a trench on the integrated circuit substrate. A first insulation layer is formed in the trench such that a surface of the first insulation layer is recessed beneath a surface of the fin exposing sidewalls of the fin. A protection layer is formed on the first insulation layer and a second insulation layer is formed on the protection layer in the trench such that protection layer is between the second insulation layer and the sidewalls of the fin. Related Fin-FETs are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.